Long-Term Availability, Ruggedness, Flexibility
The 16Z025_UART is a UART controller IP core which includes up to four 16550D compatible universal asynchronous receiver transmitter modules.
The 16Z029_CAN is a CAN controller FPGA IP core with CANopen support.
This SPI touch panel controller IP core is a Master Serial Peripheral Interface to communicate with ADS7843 (Touch Panel).
The GPIO controller is a General Purpose Input/Output module with 8 input/output ports.
This functional block is a General Purpose Input/Output core with 8 input/output ports via a serial SPI interface.
The 16Z044_DISP is a display controller IP core which adds display capabilities to the digital system.
The 16Z049_TMR is a 8254-compatible counter IP core included into a timer counter unit, which includes clock input switching, interrupt logic and a programmable time base.
The Binary I/O Controller (BIOC) provides programmable binary input/output functionality.
The HDLC Controller is a single-channel HDLC controller IP core with wishbone interface.
The DOS-compatible UART IP core includes four 16550D-compatible universal asynchronous receiver transmitter modules.
16Z061_PWM is a PWM pulse width modulation IP core generating up to 16 PWM signals.
The 16Z072_OWB is an OWB controller providing a Wishbone interface to access a one wire bus EPROM.
The 16Z073_QDEC is a quadrature decoder IP core which can be used to interface a rotary encoder switch with 2-bit quadrature coded output and with an optional pushbutton switch.
The 16Z075_SPEED is a frequency counter IP core used to determine the frequency of a signal.
The QSPI is a full-duplex, synchronous serial interface for communication with peripherals and other devices.
The 16Z077_ETH is an Ethernet MAC IP core which allows communication between an external physical Ethernet chip and a host application.
The 16Z079_ANYBUS interface allows a host application to communicate with an Anybus module.
This impulse counter IP core counts the impulses of a wheel rotation sensor.
The 16Z087_ETH is an Ethernet MAC IP core which allows communication between an external physical Ethernet chip and a host application.
The UART controller IP core includes up to four 16550D compatible universal asynchronous receiver transmitter modules.